Reference is made to FIG. 1 for showing a conventional linear audio reproduction path (ARP) 1. The ARP 1 includes a digital-to-analog converter (DAC) 2 that receives an N-bit digital code representing the digitized audio signal to be reproduced. The analog output signal of the DAC 2 is fed to a lowpass smoothing filter 3, and the smoothed analog signal is then input to a linear audio power amplifier 4 (e.g., class A, B, AB). The output of the linear power amplifier 4 drives an external speaker 5. Single bit sigma-delta techniques (a digital modulator and single bit DAC) to achieve the desired conversion accuracy are typically employed by the DAC 2.
While certain components can be implemented with state-of-the-art integrated circuit fabrication techniques, such as digital CMOS techniques using narrow linewidths and low supply voltages, implementing the DAC stage 2 and linear power amplifier 4 have become increasingly difficult to implement using these processes, while achieving a desired performance level. As such, a mixed-signal process can be used.
While high performance can be achieved with the linear amplifier 4, such as a class A, B or AB amplifier, the power efficiency is below 50% at best, resulting in the generation of excess heat as well as increased battery power consumption.
Class-D amplifiers are well known and widely used. Class-D amplifiers are particularly useful in applications where high efficiency is required, such as in power amplifiers, regulators and similar types of circuitry. The high efficiency of the class D amplifier (e.g., about 90%) makes it particularly attractive for use in battery-powered applications, such as portable radios, tape and CD players, and personal communicators, including wireless devices such as cellular telephones and mobile terminals.
FIG. 2 shows a conventional class-D ARP 6. An input N-bit digital signal (e.g., 13 to 16 bits) is applied to a digital modulator 7 where it is modulated to a one bit pulse width modulated (PWM) or a pulse density modulated (PDM) format. The PWM or PDM signal drives a switching driver 8, such as a conventional H-bridge driver configuration or an inverter, that provides a buffered modulated digital signal to a low pass filter 9. The resulting filtered analog signal is used to drive the external speaker 5.
A significant advantage of the class-D amplifier chain depicted in FIG. 2 is the high efficiency that can be achieved, typically as much as 90%. However, the linearity is degraded by the presence of second order effects, such as noise coupling from the power supply lines and non-ideal H-bridge switching characteristics. The switching and quantization noise spectrum also contains high noise levels at high frequencies, resulting in the need for the external lowpass (LC) filter 9 to avoid unnecessary power transmission and consumption, as well as to reduce undesirable noise radiation (EMC).
The use of the class-D techniques based on the digital modulator 7 provides a number of advantages for mobile wireless terminals. These advantages include an increased integration level, ease of design and testing, and compactness due to the inherent digital to analog conversion. However, a direct class D implementation (no feedback) can only achieve about 50–60 dB SNDR, as it is limited by non-ideal switching characteristics. Also, the tolerance for power supply noise (power supply rejection ratio PSRR) is also low, typically about 0–6 dB.
It is known in the art to employ binary weighted multiple speaker actuators or elements, which could be, for example, coils, or EMF, or piezoelectric-based components. As an example, the use of double coils is known for summing two stereophonic channels into a monophonic channel at low frequencies. A problem with the use of multiple drivers and speaker actuators or elements is that mismatches between the speaker actuators or elements, even as small as 1% to 2%, can result in the generation of objectionable user-perceptible audio distortion.
It is known to use Dynamic Element Matching (DEM) techniques in the context of sigma-delta converters and 1-bit data formats. Reference in this regard can be had to, for example, U.S. Pat. No. 5,990,819, “D/A converter and delta-sigma D/A converter”, by Fujimori and to U.S. Pat. No. 6,011,501, “Circuits, systems and methods for processing data in a one-bit format”, by Gong et al. Dynamic element matching and sigma-delta modulator techniques are both well known in the art.